UVMIEEE 1800.2SystemVerilogVerilator
A UVM course that runs end to end on Verilator.
Almost every UVM course out there assumes Questa, VCS or Xcelium —licences a student does not have—. This one is seven days of class, ≈ 31 h, and every one of its examples really runs on free tools. No licences, no account, no signup form. Coming from RTL or C and never wrote a class? Start anyway: day 2 is entirely the object-oriented programming UVM takes for granted.
En español: este curso nació en castellano. Ir al curso en español ›
The English course is complete — all eight days, rewritten rather than machine-translated. The examples, the exercises and the diagrams are shared by both versions and run exactly as they are.
Start in 60 seconds
# nothing to install: Code ▸ Codespaces ▸ Create codespace make u4/tests # or on your own machine, with Verilator ≥ 5.050: git clone https://github.com/leandrotozzi/verifythis cd verifythis && make doctor && make u4/tests
That compiles and runs one section of day 3 against UVM 2020.3.1 on Verilator, and prints the Report Summary you can see just below. CI runs the 38 examples and the 19 solutions every night ↗ — if something broke, that link says so before I do.
Why it exists
Verification is half the work of a chip and almost nobody learns it hands on, because the simulator costs more than the salary. This fixes that.
Since 5.050 Verilator measures covergroup, which is a topic of the course.
There is no Questa flow: you take the simulator home and keep practising without asking
anybody for a licence.
Seven days of class with presenter notes: the classic trap, the reason behind the number, the mistake everybody makes the first time. It is not a reference, and it is not a manual run through a translator.
The 38 examples are run by continuous integration on every change, and every night the nineteen exercise solutions are run too. The promise is not held up by a screenshot.
Teach it at your university, adapt it, charge for it if you want. Just cite the source. There is no paywall, no mailing list, no "leave us your email". And there is no fine print: fork it without asking anybody.
The proof
UVM 2020.3.1 on Verilator, on the course DUT. Zero errors and the real functional coverage number — not a placeholder.
$ make u4/tests ==> code/u4/tests/run.sh UVM_INFO @ 0: reporter [RNTST] Running test random_test... --- UVM Report Summary --- ** Report counts by severity UVM_INFO : 1 UVM_WARNING: 0 UVM_ERROR : 0 UVM_FATAL : 0 Coverage Summary: covergroup : 86.8% (66/76)
Syllabus
It starts at why verification exists as a discipline and ends with a capstone: an APB slave, its specification, and the whole testbench from a blank page. Every day closes with a multiple-choice review and at least one self-checking exercise, and each is between four and five and a half hours of class — ≈ 31 h, plus the optional day 8.
covergroup, bins, cross≈ 4 h · It closes looking at real waves with GTKWave.
virtual and abstract classes≈ 4 h · The real wall for whoever comes from RTL. Spend any spare time here.
uvm_test and +UVM_TESTNAMEuvm_component and the phasesuvm_env: structure against stimulus≈ 4 h 30 · The uvm_config_db, its hierarchical scope, and the reporting everything that follows gets debugged with.
uvm_analysis_portput and get≈ 4 h · Here the stimulus splits in two: who decides what to send and who knows how.
dist, inside, with≈ 4 h 30 · The data stops being a struct and becomes objects that travel.
uvm_agent, uvm_sequencer, is_activeuvm_callback, `uvm_do_callbacks, error injection in the driveruvm_sequence, body(), start_item / finish_item≈ 4 h 45 · The get_next_item / item_done handshake: 90 % of what you are going to write.
assert property, |-> against |=>, cover property≈ 5 h 15 · In the morning, how the DUT is talked to. In the afternoon, a testbench from a blank page.
import "DPI-C"≈ 4 h · It comes after the wrap-up: all three need the capstone to be done already.
Day 8 is optional and comes after the wrap-up, and both
of those are on purpose: its three pieces need the day 7 capstone to be done
already. RAL, the UVM register layer, replaces the scoreboard you have just
written — it runs on Verilator, with the two uvm-core sequences that
generate their own tests from the model, and as far as we know it is the only version
of this that exists on a free simulator. The reference model in C through
DPI replaces its prediction. And the second capstone only teaches something to
whoever already handed in the first: the bug to catch is in a flag and not in the
data, so a scoreboard that only compares what comes out passes green.
Day 7 closes with three appendices: from the VTALU to a real bus —what changes and what does not when the interface is AXI or APB—, the debug toolbox —the seven knobs of the course, and which one to use for each symptom— and the 21 silent traps —everything that compiles, runs and lies—. It closes with an ES ↔ EN glossary, because everything you read after this course is going to be in English.
How to run it
The deck opens with a double click on any machine and with no internet. To run the examples, start with the first road: it is the only one that asks nothing of you.
Start here
The repository brings a devcontainer with Verilator, UVM and
ccache already inside. You open the repo in the browser and run the examples
right there, from any machine — even a netbook.
# Code ▸ Codespaces ▸ Create codespace make u4/tests # and the second section, in seconds
Free accounts come with 60 core-hours a month, plenty for the course. It goes first because on macOS and Windows installing Verilator is half an afternoon that teaches nothing about UVM.
Without installing Verilator
The same devcontainer image, on your machine and with the repo mounted from outside: you edit with your usual editor and run inside.
docker build -t verifythis . docker run --rm -it -v "$PWD":/work \ verifythis make u4/tests
The ccache cache lives in .ccache/ of the
mounted repo, so it survives the --rm. RAM tuning in
docs/docker.md (in Spanish).
Linux · macOS
The fastest road once installed. Careful: it needs Verilator ≥ 5.050 —covergroups landed there— and the distro package is almost always behind.
git clone https://github.com/leandrotozzi/verifythis
cd verifythis
verilator --version # ≥ 5.050
make u4/tests
Two more packages are needed: z3, which is the
randomize() solver and without which day 5 lies silently, and
ccache, which makes the second UVM section compile in seconds.
The recipe to build Verilator from source is in docs/en/setup.md.
Windows
If you want the course on your machine and not in the browser: once Ubuntu is installed, everything else is identical to Linux.
wsl --install -d Ubuntu # PowerShell, as admin # and inside Ubuntu: sudo apt install git make g++ perl ccache z3 # Verilator 5.052 from source, and done
Clone inside the WSL filesystem (~/), not in
/mnt/c: there the build becomes several times slower.
Not even that
A simulator in the browser, with no local account and no install. Good for pasting
a single class and playing with one concept: polymorphism, a constraint,
a covergroup.
# edaplayground.com # paste the example from code/u6 and hit Run
It does not run the whole course —the testbenches are many files—, but it is the safety net for whoever cannot install anything today. And its commercial simulators support the transition bins Verilator does not yet.
Frequently asked
No. The course runs end to end on Verilator, which is free software, plus
Accellera's reference implementation of UVM (uvm-core 2020.3.1), which downloads
itself. There is no Questa flow in the repository: the run.do were deleted.
Yes, and it is designed for exactly that. The whole of day 2 is object-oriented programming in SystemVerilog —classes, inheritance, polymorphism, parameterized classes, the factory— because that is the real wall for whoever arrives from RTL. UVM only shows up on day 3.
With make doctor. It says whether this machine can run the course and what is
missing, with the exact command for your package manager. The two most expensive failure modes are
silent: without z3, randomize() returns 0 without saying
a thing; with a Verilator older than 5.050, functional coverage reports 0 % without a
warning.
And if the problem is that the testbench runs but lies, the list is in the 21 silent traps: everything that compiles, runs and gives no warning.
Seven days of class when taught, about 30 and a half hours — plus an optional day 8, after the wrap-up, with RAL, the reference model in C through DPI and a second capstone. On your own, count double: half the time goes into running the examples, and that half is the one that teaches. As a semester course, the 15-week map is in docs/en/for-teachers.md.
UVM 2020.3.1, Accellera's reference implementation of IEEE 1800.2-2020. Not 1.2, which is pre-IEEE. Verilator supports it officially since 5.052.
Yes, including for money. The slides are under CC BY 4.0, the examples in
code/ under Apache-2.0 and the tooling under MIT:
the only condition is citing the source and keeping the NOTICE. The repository ships
the deck as PDF and as PPTX with editable text and speaker notes.
And to teach it as a course there are three more things:
docs/en/for-teachers.md —the seven-day
course mapped onto a 15-week semester, what can be skipped and what to assess in each
midterm—, the bank with the 58 questions without
the answer marked, and a CITATION.cff for GitHub's Cite this
repository button.
No. It is the book I learned UVM with, it is in the references, and several of the
examples in code/ derive from its own —which its author published under
Apache-2.0 and which are credited here in the NOTICE—. But the structure is
another one: 8 units grouped by the problem they solve, not 24
chapters by feature. The DUT is another. The simulator is another. And there are four
units of material the book does not cover: the verification plan as a backbone,
assertions (SVA), virtual sequences and callbacks, and a capstone with a
different DUT written from a blank page. The full list is in
docs/en-que-se-diferencia.md (in Spanish).
uvm_event and uvm_barrier, the run-time
phases, and TLM2. They are named on the wrap-up slide, with where to go next.
The course is introductory and prefers to say what it does not cover.
Almost. Verilator 5.052 does not compile covergroup transition bins yet,
ignores binsof/intersect in a cross, and
has two limitations with dist and solve…before. All four are
documented with a minimal repro and the portable workaround, because hiding them would be worse
than not having them.
In the repository's Discussions for questions, and in the Issues if you found something broken. Fixes by pull request are welcome.